Host: Prof Masahiro Fujita
Kanako, Chris and I met up with Prof Fujita and research associate Dr Satoshi Komatsu in Prof Fujita’s lab [http://www.cad.t.u-tokyo.ac.jp/]. Dr Komatsu is a member of VDEC – the government-funded VLSI Design & Education Centre. Prof Fujita is a "supporting professor" for VDEC; he added that he will probably move to VDEC in the future. (Chris and Kanako told me that Prof Fujita was previously head of EDA research at the Fujitsu Laboratory in Sunnyvale, California [http://www.fujitsulabs.com/index.htm] for five or six years, up until two or three years ago, before joining the University of Tokyo.)
About VDEC’s activities
(For an overview of VDEC see first Tokyo University visit report.)
Prof Fujita explained that at the moment VDEC supports 0.35 micron chip fabrication, but that next year it plans to introduce 0.18 micron fabrication. He said that VDEC acts as a chip broker for users who only want to fabricate small numbers of chips. If more than a hundred or so chips are required, the fabrication is usually done independently of VDEC. Similarly, large university departments are free to adopt other CAD tools than the ones VDEC supports.
Dr Komatsu said that he is currently evaluating the performance of circuit synthesis tools from different vendors using two benchmarks. One is a Verilog HDL description of Motorola’s M-Core processor [http://www.eg3.com/m-core.htm] and the other is his own design – a coder/decoder designed to reduce bus power consumption by minimising the number of bit transitions. (He got his PhD in April of this year.)
About the Department of Electronic Engineering
Prof Fujita explained that the Dept. of Electronic Engineering is one of three departments that are managed as one group as far as the students are concerned. Students officially enrolled in any one of the three departments can freely choose to take courses from any of the three; postgraduate students are supposed to discuss which ones they should take with their supervising professors. The emphasis is on hardware, but there are also software-oriented courses on offer. In this sense, there seems to be better integration between hardware and software activities at the University of Tokyo than in most other Japanese universities. (A day later we met with Prof Tsukamoto from Kogakuin University who happened to mention that his youngest son is currently a third year undergraduate student in one of these three departments. He confirmed what Prof Fujita had said about students being free to select courses from any of the three departments.)
From the University’s website it seems that the three departments in question are the Dept. of Electrical Engineering, the Dept. of Information and Communication Engineering and the Dept. of Electronic Engineering. These departments are listed as belonging to the "Faculty of Engineering" for undergraduate courses, and the "Graduate School of Engineering" for postgraduate courses. Prof Fujita pointed out that since the Dept. of Information and Communication Engineering is in the Faculty/School of Engineering it is oriented more towards computer engineering than computer science; there is a separate Department of Information Science within the Faculty/School of Science that caters for pure computer science.
Prof Fujita said that there are about 140 undergraduate students in total each year (in all three departments combined, presumably), and that roughly 80% continue on to do a Masters. While in most university departments there are fewer Masters students than undergraduates, in their case there are actually more – about 160 postgraduate students in total each year. This means that around 50 graduates from other universities join the Masters courses each year.
Foreign Students
Prof Fujita said that around 10-15% of the postgraduate students are foreign – mostly Asian. He explained that a "foreign" student is one who does not have a qualification from a Japanese senior high school. This figure is high for a Japanese university, but there are far more foreign students in comparable UK and American universities. Prof Fujita said that while state-funded universities in America such as the University of California are limited to having no more than around 20% foreign students, private universities have many more. He said that in some of the top private universities like Carnegie-Mellon it is not unusual for over half of the students in Computer Science or Elec. Eng. to be foreign nationals. He mentioned that there are many Chinese students, in particular, in such departments.
Prof Fujita also said that there are ten special slots each year for foreign students that are supported by scholarships from the Japanese government. The scholarships cover living expenses as well as tuition fees. There is a list of eligible countries; the scheme was set up as a form of charity from Japan to those countries. Apparently there is a selection of courses that are taught in English specifically for these students. Prof Fujita explained that "in theory" this should allow a foreign student to go through five years of postgraduate study (two years for a Masters plus three more for a Doctorate) without ever having to take a class in Japanese. He added that the Japanese students may opt to take these courses too, but few do.
There are two routes to obtaining a PhD in the Japanese university system; a student may undertake a research project based within a university or they may be based in industry. Prof Fujita said that the Japanese government also offers scholarships for foreign nationals employed in research positions within industry overseas to register for a PhD with a Japanese university. These scholarships provide sufficient travel and subsistence expenses to enable students to attend the university for something like 30 days per year. (This scheme is not limited to the University of Tokyo.)
Courses relating to chip design
Prof Fujita said that third year undergraduate students are introduced to LSI design via two six-week courses. Each course consists of six weekly 4-hour sessions; one is oriented towards chip fabrication, but in the other the students engage in hands-on FPGA design. This year they used Altera boards and an FPGA compiler from Synopsis, but Prof Fujita said that he is considering using Celoxica’s Handel-C/DK-1 and RC100 boards next year. He seemed particularly impressed by the fact that the Celoxica boards contain drivers for a range of input and output peripherals, which he said makes it much more exciting for students than just having 7-segment LED displays. He said that although they have some PCs, they mainly use Sun/Solaris machines.
The FPGA design course starts in the first or second week of October. Although most of the students are from the Dept. of Electrical and Electronic Engineering (?), some are from the Dept. of Information and Communication Engineering. Prof Fujita explained that in the first week students receive a formal lecture introducing them to the subject, and then in weeks 2, 3, 4 and 5 they work independently on individual projects with assistance from instructors and/or teaching assistants. He said that although there are only four hours per week of scheduled class time, many of the students devote much more time than this to their projects. In the sixth week the students are expected to present their designs. Most of them attempt only modest designs such as a counter or a calculator, but a few are more ambitious. I was impressed that the students were able/expected to produce working designs after such a short introduction to the technology, and I was even more impressed when Prof Fujita added that for many of the students this was also their first experience of using Unix.
About Handel-C/DK-1 versus other languages/products
Chris asked Prof Fujita for his overall views about C-based languages in general and about Handel-C in particular versus other C-based languages. In answer to the first question Prof Fujita suggested that C-based languages are/will be useful in some circumstances but not in others. He said it depends on how clear a picture you have of the system you intend to build; if you have a clear picture in your mind of the data path, scheduling and allocation, then you should be able to define the system using structured HDL. On the other hand, if you don’t have a clear picture in your mind, a C-based language is much better than HDL for design space exploration. He said that even the people at NEC – who are committed Cyber-C users [http://www.eetimes.com/news/98/1017news/nec.html] – admit that it’s better to use HDL in the former scenario.
In answer to the second question Prof Fujita said "it depends on whether you want to be inside C++, or whether it’s OK to be outside". He said that the semantics of a language – i.e. the precise meaning of the language elements, and therefore the meaning of anything written in the language - are crucial. (Prof Imai had also stressed this when we visited him at Osaka University.) Prof Fujita explained that the semantics of a specification/design language can be defined either implicitly or explicitly. In the former case the semantics are defined through simulation. This is fine from the point of view of natural understanding, but as far as EDA development is concerned it makes life more difficult. However, users often don’t care at all about this - they only care whether there are good EDA tools to support a given language. He subsequently mentioned a recent panel discussion at which someone (?) remarked that there are now a couple of "very mature" synthesis tools that support C-based hardware design languages; one of these being DK-1.
Prof Fujita queried whether there was any work ongoing in the area of verification – other than simulation - for Handel-C designs. He implied that this was something that was lacking in the current DK-1 suite.
A good target architecture for Handel-C?
Prof Fujita suggested that a combined CPU/FPGA chip incorporating a very small CPU acting as a controller for the FPGA would be a good target architecture for Handel-C (or any other C-based language). He said that this should provide good flexibility and performance, and would have the advantage of making designs relatively easy to debug. The on-chip CPU could work in conjunction with a more powerful off-chip CPU.
Miscellaneous
The University of Tokyo is generally regarded as being the most prestigious university in Japan. Quoting from its website: "The University has a faculty of approximately 2,800 professors, associate professors, and lecturers, and a total student enrollment of about 28,000. There are about 2,000 foreign students, and about 1,700 foreign scholars who come to the University for short or extended visits." I would imagine that the relatively high (1:10) staff-to-student ratio and numbers of foreign students and scholars are probably close to the upper bounds for Japanese universities.
Prof Fujita mentioned that the Japanese government is planning to compile league tables of universities in different disciplines. He said that the formula they have proposed for assessing "quality" seems rather complicated.
He mentioned that EDA vendors such as Synopsis and Cadence say that they ought really to employ more engineers in Japan, but they are reluctant to do this because of the relatively high cost of employment in Japan.
He mentioned that Forte are currently developing a C++ synthesis tool which is scheduled for release early next year. [Forte’s home page... http://www.fortedesignsystems.com/]
He mentioned that the Japanese company Omron are currently developing an analogue FPGA. This will be quite a revolutionary product, useful for constructing things like filters and D/A converters. [Omron’s home page... http://www.omron.com/]
He said that there is an organisation a bit like VDEC in America, called Mosis. [Mosis’ home page... http://www.mosis.org/]
Acknowledgement
I am indebted to Prof Fujita for his feedback on this report.
|
|